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ltc5567 1 5567f typical a pplica t ion fea t ures descrip t ion 300mhz to 4ghz active downconverting mixer with wideband if the ltc ? 5567 is optimized for rf downconverting mixer applications that require wide if bandwidth. the part is also a pin-compatible upgrade to the lt5557 active mixer, offering higher linearity and 1db compression, wider bandwidth, and lower output spurious levels. integrated rf and lo transformers and lo buffer amplifiers allow a very compact solution. the rf input is 50 matched from 1.4ghz to 3ghz, and easily matched for higher or lower rf frequencies with simple external matching. the lo input is 50 matched from 1ghz to 4ghz, even when the ic is disabled. the lo input is easily matched for higher or lower frequencies, as low as 300mhz, with simple external matching. the low capacitance differential if output is usable up to 2.5ghz. a pplica t ions n high iip3: +26.9dbm at 1950mhz n 1.9db conversion gain n low noise figure: 11.8db at 1950mhz n 16.5db nf under 5dbm blocking n low power: 294mw n wide if frequency range up to 2.5ghz n lo input 50 matched when shutdown n C40c to 105c operation (t c ) n very small solution size n pin compatible with lt5557 n 16-lead (4mm 4mm) qfn package n wireless infrastructure receivers n dpd observation receivers n catv infrastructure l , lt, ltc, ltm, linear technology and the linear logo are registered trademarks of linear technology corporation. all other trademarks are the property of their respective owners. rf en en 10nf 249 249 lo 1.65ghz 0dbm 3.3v 89ma 10nf v cc if + ltc5567 if ? iadj 2.7pf rf 1.69ghz to 2.24ghz 330pf 200 load 330pf bias rf 5567 ta01a 3.9pf lo lo 100 100 390nh if amp 390nh dpd observation receiver mixer with 500mhz if bandwidth and +13dbm input p1db into 200 load voltage conversion gain, iip3 and nf vs if frequency if frequency (mhz) 40 90 g v (db), iip3 (dbm), ssb nf (db) 390 440 490 540 5567 ta01b 140 190 240 290 340 590 12 10 8 6 4 14 18 20 22 28 16 24 26 iip3 g v nf rf = 1.69ghz to 2.24ghz lo = 1.65ghz z rf = 50 z if = 200 differential t c = 25c
ltc5567 2 5567f p in c on f igura t ion a bsolu t e maxi m u m r a t ings supply voltage (v cc , if + , if C ) .................................. 4.0 v enable input voltage (en) ................ C 0.3v to v cc + 0.3v lo input power (300mhz to 4.5ghz) ................. +1 0dbm lo input dc voltage ............................................... 0.1v rf input power (300mhz to 4ghz) .................... +1 5dbm rf input dc voltage ............................................... 0 .1v temp monitor input current .................................. 10 ma operating temperature range (t c ) ........ C40c to 105c jun ction temperature (t j ) .................................... 150 c storage temperature range .................. C 65c to 150c (note 1) 16 15 14 13 5 6 7 8 top view 17 gnd uf package 16-lead (4mm 4mm) plastic qfn 9 10 11 12 4 3 2 1temp gnd rf gnd gnd if + if ? gnd gnd lo nc gnd en v cc nc iadj t jmax = 150c, jc = 8c/w exposed pad (pin 17) is gnd, must be soldered to pcb o r d er i n f or m a t ion lead free finish tape and reel part marking package description case temperature range ltc5567iuf#pbf ltc5567iuf#trpbf 5567 16-lead (4mm 4mm) plastic qfn C40c to 105c consult ltc marketing for parts specified with wider operating temperature ranges. consult ltc marketing for information on non-standard lead based finish parts. for more information on lead free part marking, go to: http://www.linear.com/leadfree/ for more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/ ac e lec t rical c harac t eris t ics v cc = 3.3v, en = high. test circuit shown in figure 1. (notes 2, 3, 4) parameter conditions min typ max units rf input frequency range 300 to 4000 mhz lo input frequency range 300 to 4500 mhz if output frequency range external matching required 5 to 2500 mhz rf input return loss z o = 50, 1400mhz to 3000mhz, c3 = 2.7pf >12 db lo input return loss z o = 50, 1000mhz to 4000mhz, c5 = 3.9pf >10 db if output impedance differential at 153mhz 532 ||1.0pf r||c lo input power C6 0 6 dbm rf to lo isolation rf = 300mhz to 1000mhz rf = 1000mhz to 4000mhz >59 >50 db db rf to if isolation rf = 300mhz to 700mhz rf = 700mhz to 1000mhz rf = 1000mhz to 4000mhz >47 >40 >28 db db db
ltc5567 3 5567f ac e lec t rical c harac t eris t ics v cc = 3.3v, en = high. t c = 25c, p lo = 0dbm, if = 153mhz, p rf = C6dbm (C6dbm/tone for 2-tone tests), unless otherwise noted. test circuit shown in figure 1. (notes 2, 3, 4) parameter conditions min typ max units power conversion gain rf = 450mhz, high side lo rf = 850mhz, high side lo rf = 1950mhz, low side lo rf = 2550mhz, low side lo rf = 3500mhz, low side lo 0.8 1.5 2.0 1.9 1.7 1.2 db db db db db conversion gain flatness rf = 1950 30mhz, lo = 1797mhz, if = 153 30mhz 0.09 db conversion gain vs temperature t c = C40c to 105oc, rf = 1950mhz, low side lo C0.013 db/c 2-tone input 3rd order intercept (?f rf = 2mhz) rf = 450mhz, high side lo rf = 850mhz, high side lo rf = 1950mhz, low side lo rf = 2550mhz, low side lo rf = 3500mhz, low side lo 24.2 26.0 26.7 26.9 26.0 26.5 dbm dbm dbm dbm dbm 2-tone input 2nd order intercept (?f rf = 154mhz = f im2 ) rf = 450mhz (527mhz/373mhz), lo = 603mhz rf = 850mhz (927mhz/773mhz), lo = 1003mhz rf = 1950mhz (2027mhz/1873mhz), lo = 1797mhz rf = 2550mhz (2627mhz/2473mhz), lo = 2397mhz rf = 3500mhz (3577mhz/3423mhz), lo = 3347mhz 67 64 72 71 63 dbm dbm dbm dbm dbm ssb noise figure rf = 450mhz, high side lo rf = 850mhz, high side lo rf = 1950mhz, low side lo rf = 2550mhz, low side lo rf = 3500mhz, low side lo 12.5 11.4 11.8 12.6 14.6 13.5 db db db db db ssb noise figure under blocking rf = 850mhz, high side lo, 750mhz blocker at 5dbm rf = 1950mhz, low side lo, 2050mhz blocker at 5dbm 16.5 16.5 db db lo to rf leakage lo = 300mhz to 700mhz lo = 700mhz to 2200mhz lo = 2200mhz to 4500mhz ltc5567 4 5567f note 1: stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. exposure to any absolute maximum rating condition for extended periods may affect device reliability and lifetime. note 2: the ltc5567 is guaranteed functional over the C40c to 105c case temperature range ( jc = 8c/w). note 3: ssb noise figure measured with a small-signal noise source, bandpass filter and 2db matching pad on rf input, and bandpass filter on the lo input. note 4: specified performance includes 4:1 if transformer and evaluation pcb losses. typical d c p er f or m ance c harac t eris t ics supply current vs supply voltage temp diode voltage vs junction temperature en = high, test circuit shown in figure 1. d c e lec t rical c harac t eris t ics v cc = 3.3v, t c = 25c. test circuit shown in figure 1. (note 2) parameter conditions min typ max units supply voltage (v cc ) 3.0 3.3 3.6 v supply current enabled disabled en = high en = low 89 105 100 ma a enable logic input (en) input high voltage (on) 2.5 v input low voltage (off) 0.3 v input current C0.3v to v cc + 0.3v C30 100 a turn-on time 0.6 s turn-off time 0.5 s mixer dc current adjust (iadj) open-circuit dc voltage 2.2 v short-circuit dc current pin shorted to ground 1.8 ma temperature sensing diode (temp) dc voltage at t j = 25c i in = 10a i in = 80a 716 773 mv mv voltage temperature coefficient i in = 10a i in = 80a C1.75 C1.56 mv/c mv/c v cc supply voltage (v) 3.0 98 96 94 92 90 88 86 84 3.3 3.5 5567 g01 3.1 3.2 3.4 3.6 supply current (ma) t c = 105c t c = 85c t c = 55c t c = 25c t c = ?10c t c = ?40c junction temperature (c) ?45 ?20 500 temp diode voltage (mv) 550 600 650 700 900 5 30 55 80 5567 g02 105 130 750 800 850 i in = 80a i in = 10a
ltc5567 5 5567f conversion gain, iip3 and nf vs rf frequency (high side lo) rf isolation vs rf frequency lo leakage vs lo frequency conversion gain, iip3 and nf vs rf frequency (low side lo) 1950mhz conversion gain, iip3 and nf vs lo power (low side lo) 1950mhz conversion gain, iip3 and nf vs lo power (high side lo) 2550mhz conversion gain, iip3 and nf vs lo power (low side lo) 2550mhz conversion gain, iip3 and nf vs lo power (high side lo) typical p er f or m ance c harac t eris t ics 1400mhz to 3000mhz application. test circuit shown in figure 1. v cc = 3.3v, p lo = 0dbm, p rf = C6dbm (C6dbm/tone for 2-tone iip3 tests, ? f = 2mhz), if = 153mhz unless otherwise noted. rf frequency (ghz) 1.4 10 iip3 (dbm), nf (db) g c (db) 12 16 18 20 30 24 1.8 2.2 2.4 5567 g03 14 26 28 22 0 2 5 1 4 3 1.6 2.0 2.6 2.8 3.0 iip3 g c nf t c = 25c lo input power (dbm) ?6 0 g c (db), iip3 (dbm), ssb nf (db) 4 8 12 28 nf 20 ?2 2 4 24 16 2 6 10 26 18 22 14 ?4 0 6 5567 g04 t c = 85c t c = 25c t c = ?40c iip3 g c lo input power (dbm) ?6 0 g c (db), iip3 (dbm), ssb nf (db) 4 8 12 28 20 ?2 2 4 24 16 2 6 10 26 18 22 14 ?4 0 6 5567 g05 iip3 g c nf t c = 85c t c = 25c t c = ?40c rf frequency (ghz) 1.4 10 iip3 (dbm), nf (db) g c (db) 12 16 18 20 30 24 1.8 2.2 2.4 5567 g06 14 26 28 22 0 2 5 1 4 3 1.6 2.0 2.6 2.8 3.0 iip3 g c nf t c = 25c lo input power (dbm) ?6 0 g c (db), iip3 (dbm), ssb nf (db) 4 8 12 28 nf 20 ?2 2 4 24 16 2 6 10 26 18 22 14 ?4 0 6 5567 g07 iip3 g c t c = 85c t c = 25c t c = ?40c lo input power (dbm) ?6 0 g c (db), iip3 (dbm), ssb nf (db) 4 8 12 28 20 ?2 2 4 24 16 2 6 10 26 18 22 14 ?4 0 6 5567 g08 iip3 g c nf t c = 85c t c = 25c t c = ?40c rf frequency (ghz) 1.4 rf isolation (db) 45 55 3.0 5567 g09 35 25 1.8 2.2 2.6 1.6 2.0 2.4 2.8 65 40 50 30 60 rf-lo rf-if t c = 25c lo frequency (ghz) 1.2 lo leakage (dbm) ?40 ?30 ?20 2.8 5567 g10 ?50 ?60 ?70 1.6 2.0 lo-if lo-rf 2.4 3.2 t c = 25c
ltc5567 6 5567f ssb noise figure vs rf blocker level 1950mhz conversion gain distribution conversion gain, iip3, nf and rf input p1db vs temperature 1950mhz iip3 distribution conversion gain, iip3 and nf vs supply voltage 1950mhz ssb nf distribution 2-tone if output power, im3 and im5 vs rf input power single tone if output power, 2 2 and 3 3 spurs vs rf input power 2 2 and 3 3 spur suppression vs lo power typical p er f or m ance c harac t eris t ics 1400mhz to 3000mhz application. test circuit shown in figure 1. v cc = 3.3v, p lo = 0dbm, p rf = C6dbm (C6dbm/tone for 2-tone iip3 tests, ? f = 2mhz), if = 153mhz unless otherwise noted. rf input power (dbm/tone) ?12 ?90 output power/tone (dbm) ?70 ?50 im3 im5 ?30 ?9 ?6 ?3 0 5567 g11 3 ?10 10 ?80 ?60 ?40 ?20 0 6 if out t c = 25c rf1 = 1949mhz rf2 = 1951mhz lo = 1797mhz rf input power (dbm) ?15 ?85 output power (dbm) ?75 ?55 ?45 ?35 15 ?15 ?9 ?3 0 12 5567 g12 ?65 ?5 5 ?25 ?12 ?6 3 6 9 if out (rf = 1950mhz) 2rf-2lo (rf = 1873.5mhz) 3rf-3lo (rf = 1848mhz) t c = 25c lo = 1797mhz lo input power (dbm) ?6 ?90 relative spur level (dbc) ?85 ?80 ?75 ?70 ?60 ?4 ?2 0 2 5567 g13 4 6 ?65 2rf-2lo (rf = 1873.5mhz) 3rf-3lo (rf = 1848mhz) t c = 25c rf = 1950mhz p rf = ?6dbm lo = 1797mhz rf blocker power (dbm) ?25 ssb nf (db) 14 20 21 22 ?15 ?5 0 5567 g14 12 18 16 13 19 11 17 15 ?20 ?10 5 10 t c = 25c rf = 1950mhz blocker = 2050mhz lo = 1797mhz p lo = ?3dbm p lo = 3dbm p lo = 0dbm case temperature (c) ?45 0 g c and ssb nf (db), iip3 and p1db (dbm) 4 8 12 28 20 ?15 15 24 16 2 6 10 26 18 22 14 45 75 105 5567 g15 iip3 ssb nf p1db g c rf = 1950mhz low side lo v cc supply voltage (v) 3.0 0 g c (db), iip3 (dbm), ssb nf (db) 6 12 18 3.1 3.2 3.3 3.4 5567 g16 3.5 24 30 nf g c 3 9 15 21 27 3.6 rf = 1950mhz low side lo iip3 t c = 85c t c = 25c t c = ?40c conversion gain (db) 0.6 1.0 distribution (%) 30 40 50 1.4 1.8 5567 g17 20 10 25 35 45 15 5 0 2.2 2.6 3.0 105c 25c ?40c rf = 1950mhz, low side lo iip3 (dbm) 24.6 distribution (%) 25.8 5567 g18 20 10 25 15 5 0 26.4 27.6 28.8 25.2 27.0 28.2 30 rf = 1950mhz, low side lo 105c 25c ?40c ssb noise figure (db) 10.2 distribution (%) 30 50 10.8 11.4 12.0 12.6 13.2 5567 g19 20 10 25 40 45 35 15 5 0 13.8 rf = 1950mhz low side lo 105c 25c ?40c
ltc5567 7 5567f conversion gain, iip3 and nf vs rf frequency 850mhz conversion gain, iip3 and nf vs lo power 850mhz conversion gain, iip3 and nf vs supply voltage 2-tone if output power, im3 and im5 vs rf input power single tone if output power, 2 2 and 3 3 spurs vs rf input power 2 2 and 3 3 spur suppression vs lo power rf isolation and lo leakage vs frequency conversion gain, iip3, nf and rf input p1db vs temperature ssb noise figure vs rf blocker level typical p er f or m ance c harac t eris t ics 700mhz to 1000mhz application. test circuit shown in figure 1. v cc = 3.3v, p lo = 0dbm, p rf = C6dbm (C6dbm/tone for 2-tone iip3 tests, ? f = 2mhz), if = 153mhz unless otherwise noted. rf frequency (mhz) 700 0 g c (db), iip3 (dbm), ssb nf (db) 4 8 12 28 20 750 800 950 24 16 2 6 10 26 18 22 14 850 900 1000 5567 g20 iip3 nf g c high side lo t c = 25c lo input power (dbm) ?6 0 g c (db), iip3 (dbm), ssb nf (db) 4 8 12 28 20 ?2 2 4 24 16 2 6 10 26 18 22 14 ?4 0 6 5567 g21 iip3 g c nf rf = 850mhz high side lo t c = 85c t c = 25c t c = ?40c v cc supply voltage (v) 3.0 1 g c (db), iip3 (dbm), ssb nf (db) 4 10 13 16 3.4 28 5567 g22 7 3.2 3.1 3.5 3.3 3.6 19 22 25 iip3 g c nf rf = 850mhz high side lo t c = 85c t c = 25c t c = ?40c rf/lo frequency (mhz) 700 0 rf isolation (db) lo leakage (dbm) 20 30 40 50 60 70 ?70 10 ?60 ?50 ?40 ?30 ?20 ?10 0 800 900 1000 1100 5567 g23 1200 rf-lo iso lo-if lo-rf rf-if iso t c = 25c case temperature (c) ?45 0 g c (db), nf (db), iip3 (dbm), p1db (dbm) 4 8 12 28 20 15 75 24 16 2 6 10 26 18 22 14 ?15 45 105 5567 g24 iip3 g c nf p1db rf = 850mhz high side lo rf blocker power (dbm) ?25 ssb nf (db) 14 20 21 22 ?15 ?5 0 5567 g25 12 18 16 13 19 11 17 15 ?20 ?10 5 10 t c = 25c rf = 850mhz blocker = 750mhz lo = 1003mhz p lo = ?3dbm p lo = 3dbm p lo = 0dbm rf input power (dbm/tone) ?12 ?80 output power/tone (dbm) ?60 ?40 ?20 ?9 ?6 ?3 0 5567 g26 3 0 20 ?70 ?50 ?30 ?10 10 6 if out im3 im5 t c = 25c rf1 = 849mhz rf2 = 851mhz lo = 1003mhz rf input power (dbm) ?15 ?85 output power (dbm) ?75 ?55 ?45 ?35 15 ?15 ?9 ?3 0 12 5567 g27 ?65 ?5 5 ?25 ?12 ?6 3 6 9 if out (rf = 850mhz) 2lo-2rf (rf = 926.5mhz) 3lo-3rf (rf = 952mhz) t c = 25c lo = 1003mhz lo input power (dbm) ?6 ?90 relative spur level (dbc) ?85 ?80 ?75 ?70 ?60 ?4 ?2 0 2 5567 g28 4 6 ?65 2lo-2rf (rf = 926.5mhz) 3lo-3rf (rf = 952mhz) t c = 25c rf = 850mhz p rf = ?6dbm lo = 1003mhz
ltc5567 8 5567f 3ghz to 4ghz application. test circuit shown in figure 1. conversion gain, iip3 and nf vs rf frequency conversion gain, iip3 and nf vs rf frequency rf isolation vs rf frequency lo leakage vs lo frequency 450mhz conversion gain, iip3 and nf vs lo power 3500mhz conversion gain, iip3 and nf vs lo power conversion gain, iip3 and rf input p1db vs temperature 3500mhz conversion gain, iip3 and nf vs supply voltage rf isolation and lo leakage vs rf and lo frequency typical p er f or m ance c harac t eris t ics 400mhz to 500mhz application. test circuit shown in figure 1. v cc = 3.3v, p lo = 0dbm, p rf = C6dbm (C6dbm/tone for 2-tone iip3 tests, ? f = 2mhz), if = 153mhz unless otherwise noted. rf frequency (mhz) 400 1 g c (db), iip3 (dbm), ssb nf (db) 3 7 9 11 21 23 25 27 15 425 450 5567 g29 5 17 19 13 475 500 iip3 nf g c high side lo t c = 25c lo input power (dbm) ?6 0 g c (db), iip3 (dbm), nf (db) 3 9 12 15 2 27 5567 g30 6 ?2?4 4 0 6 18 21 24 iip3 g c nf high side lo t c = 85c t c = 25c t c = ?40c rf/lo frequency (mhz) 400 rf isolation (db) lo leakage (dbm) 45 50 55 550 650 5567 g31 40 35 30 450 500 600 60 65 70 ?50 ?40 ?30 ?60 ?70 ?80 ?20 ?10 0 700 rf-lo lo-if lo-rf rf-if t c = 25c 0 4 8 12 28 20 24 16 2 6 10 26 18 22 14 rf frequency (ghz) 3.0 g c (db), iip3 (dbm), ssb nf (db) 3.2 3.4 5567 g32 3.6 4.03.8 iip3 nf g c low side lo t c = 25c lo input power (dbm) ?6 0 g c (db), iip3 (dbm), ssb nf (db) 3 9 12 15 2 27 5567 g33 6 ?2 ?4 4 0 6 18 21 24 t c = 85c t c = 25c t c = ?40c iip3 g c nf rf = 3.5ghz low side lo v cc supply voltage 3.0 0 g c (db), iip3 (dbm), ssb nf (db) 3 9 12 15 3.4 27 5567 g34 6 3.23.1 3.5 3.3 3.6 18 21 24 iip3 g c nf rf = 3.5ghz low side lo t c = 85c t c = 25c t c = ?40c rf frequency (ghz) 3.0 ?40 rf isolation (db) 10 20 30 40 ?10 ?20 ?30 0 60 rf-lo rf-if 3.2 3.4 3.6 5567 g35 3.8 4.0 50 t c = 25c lo frequency (ghz) 2.6 lo leakage (dbm) lo-if lo-rf 2.9 3.2 3.5 3.8 5567 g36 4.1 4.4 ?60 ?50 ?40 ?55 ?45 ?35 ?30 ?20 ?25 t c = 25c case temperature (c) ?45 0 g c (db), iip3 (dbm), p1db (dbm), ssbnf (db) 4 8 12 28 20 15 75 24 16 2 6 10 26 18 22 14 ?15 45 105 5567 g37 iip3 g c nf p1db rf = 3500mhz low side lo
ltc5567 9 5567f p in func t ions temp (pin 1): temperature sensing diode. this pin is connected to the anode of a diode that may be used to measure the die temperature, by forcing a current and measuring the voltage. gnd (pins 2, 4, 9, 12, 13, 16, exposed pad pin 17): ground. these pins must be soldered to the rf ground plane on the circuit board. the exposed pad metal of the package provides both electrical contact to ground and good thermal contact to the printed circuit board. rf (pin 3): single-ended rf input. this pin is internally connected to the primary winding of the integrated rf transformer, which has low dc resistance to ground. a series dc-blocking capacitor must be used if the rf source has dc voltage present. the rf input is 50 impedance matched from 1.4ghz to 3ghz, as long as the mixer is enabled. operation down to 300mhz or up to 4ghz is possible with external matching. en (pin 5): enable pin. when the input voltage is greater than 2.5v, the mixer is enabled. when the input voltage is less than 0.3v, the mixer is disabled. typical input current is less than 30a. this pin has an internal pull-down resistor. v cc (pin 6): power supply pin. this pin must be connected to a regulated 3.3v supply, with a bypass capacitor located close to the pin. typical dc current consumption is 34ma. nc (pins 7, 14): these pins are not connected internally. they can be left floating, connected to ground, or to v cc . iadj (pin 8): this pin allows adjustment of the mixer dc supply current. typical open-circuit dc voltage is 2.2v. this pin should be left floating for optimum performance. if + /if C (pin 11/pin 10): open-collector differential if output. these pins must be connected to the v cc supply through impedance-matching inductors or a transformer center tap. typical dc current consumption is 27.5ma into each pin. lo (pin 15): single-ended local oscillator input. this pin is internally connected to the primary winding of an integrated transformer, which has low dc resistance to ground. a series dc-blocking capacitor must be used to avoid damage to the internal transformer. this input is 50 impedance matched from 1ghz to 4ghz, even when the ic is disabled. operation down to 300mhz or up to 4.5ghz is possible with external matching. b lock diagra m 5567 bd gnd gnd rf en nc v cc if + if ? iadj temp bias rf lo lo 12 11 9 10 8 5 7 6 gnd nc gnd 13 16 14 15 gnd gnd 1 2 4 gnd (exposed pad) 17 3
ltc5567 10 5567f t es t circui t rf 0.015" 0.062" 0.015" gnd bias gnd dc1861a evaluation board layer stack-up (nelco n4000-13) rf in 50 l3 c3 c4 5567 f01 rf en c2 r2 r1 lo in 50 v cc 3.3v 89ma c1 c9 v cc if + ltc5567 if ? iadj nc c7 t1 c8 c5 l1 l2 17 gnd 2 3 gnd 1 temp 4 gnd gnd 9 6 5 7 8 en c6 gnd lo 12 11 10 gnd nc gnd 16 14 15 13 if out 50 r4 0 application rf match lo match rf (mhz) lo c3 c4 l3 c5 c6 300 to 400 hs 120pf 18pf 2.2nh 47pf 15pf 400 to 500 hs 120pf 12pf 2nh 27pf 10pf 700 to 1000 hs 120pf 4.7pf 6.8pf 2.7pf 1400 to 3000 ls, hs 2.7pf 3.9pf 3000 to 4000 ls 3.9pf 0.7pf 3.9pf ls = low side, hs = high side ref des value size vendor ref des value size vendor c1, c2 10nf 0402 avx c9 1f 0603 avx c3 - c6 see table 0402 avx t1 4:1 mini-circuits tc8-1-10ln+ c7, c8 330pf 0402 avx l1, l2 300nh 0603 coilcraft 0603hp r1, r2 3.01k, 1% 0402 l3 see table 0402 coilcraft 0402hp figure 1. standard downmixer test circuit schematic (153mhz bandpass if matching)
ltc5567 11 5567f a pplica t ions i n f or m a t ion introduction the ltc5567 incorporates a high linearity double-balanced active mixer, a high-speed limiting lo buffer and bias/ enable circuits. see the pin functions and block diagram sections for a description of each pin. a test circuit sche - matic showing all external components required for the data sheet specified performance is shown in figure 1. a few additional components may be used to modify the dc supply current or frequency response, which will be discussed in the following sections. the lo and rf inputs are single ended. the if output is differential. low side or high side lo injection may be used. the test circuit, shown in figure 1, utilizes bandpass if output matching and an 8:1 if transformer to realize a 50 single-ended if output. the evaluation board layout is shown in figure 2. rf input a simplified schematic of the mixers rf input is shown in figure 3. as shown, one terminal of the integrated rf transformers primary winding is connected to pin 3, while the other terminal is dc-grounded internally. for this rea - son, a series dc-blocking capacitor (c3) is needed if the rf source has dc voltage present. the dc resistance of the primary winding is approximately 4. the secondary winding of the rf transformer is internally connected to the rf buffer amplifier. the rf input is 50 matched from 1400mhz to 3000mhz with a single 2.7pf series capacitor on the input. matching to rf frequencies above or below this frequency range is easily accomplished by adding shunt capacitor c4, shown in figure 3. for rf frequencies below 500mhz, series figure 2. evaluation board layout
ltc5567 12 5567f a pplica t ions i n f or m a t ion inductor l3 is also needed. the evaluation board does not have provisions for l3, so the rf input trace needs to be cut to install it in series. the rf input matching ele- ment values for each application are tabulated in figure 1. measured rf input return losses are shown in figure 4. the rf input impedance and input reflection coefficient, versus frequency are listed in table 1. table 1. rf input impedance and s11 (at pin 3, no external matching, mixer enabled) frequency (mhz) input impedance s11 mag angle 200 6.0 + j8.0 0.79 161.6 350 9.0 + j11.9 0.71 152.1 450 11.0 + j14.1 0.66 147.0 575 13.3 + j15.9 0.61 142.5 700 15.4 + j17.5 0.57 138.1 900 18.5 + j20.0 0.52 131.1 1100 21.7 + j22.0 0.48 125.1 1400 27.4 + j24.2 0.41 115.6 1700 33.7 + j24.2 0.33 107.9 1950 39.1 + j21.6 0.26 103.1 2200 42.6 + j16.1 0.19 104.9 2450 42.6 + j9.9 0.13 120.8 2700 38.8 + j4.3 0.14 155.9 3000 31.9 + j2.3 0.22 171.3 3300 24.8 + j4.0 0.34 167.9 3600 19.5 + j8.2 0.45 158.3 3900 15.4 + j13.4 0.56 147.3 4200 12.6 + j18.7 0.64 136.8 4500 10.9 + j24.2 0.70 126.6 lo input a simplified schematic of the lo input, with external components is shown in figure 5. similar to the rf in- put, the integrated lo transformers primary winding is dc - grounded internally , and therefore requires an external dc-blocking capacitor. capacitor c5 provides the neces - sary dc-blocking, and optimizes the lo input match over the 1ghz to 4ghz frequency range. the nominal lo input level is 0dbm although the limiting amplifiers will deliver excellent performance over a 5db input power range. lo input power greater than +6dbm may cause conduction of the internal esd diodes. to optimize the lo input match for frequencies below 1ghz, the value of c5 is increased and shunt capacitor c6 is added. a summary of values for c5 and c6, versus lo lo buffer lo c6 5569 f05 ltc5567 15 c5 lo in figure 5. lo input schematic rf buffer rf c4 5567 f03 l3 ltc5567 3 c3 rf in figure 3. rf input schematic figure 4. rf input return loss frequency (ghz) 0.2 return loss (db) ?15 ?10 ?5 3.2 5567 f04 ?20 ?25 1.2 2.2 0.7 3.7 1.7 2.7 4.74.2 ?30 ?35 0 400mhz to 500mhz app. 700mhz to 1000mhz app. 1400mhz to 3000mhz app. 3ghz to 4ghz app. t c = 25c
ltc5567 13 5567f a pplica t ions i n f or m a t ion frequency range is listed in table 2. measured lo input return losses are shown in figure 6. finally, lo input im - pedance and input reflection coefficient, versus frequency is shown in table 3. table 2. lo input matching values vs lo frequency range frequency (mhz) c5 (pf) c6 (pf) 285 to 392 330 33 338 to 415 330 22 415 to 505 56 18 525 to 635 27 10 645 to 803 15 7.5 800 to 1150 6.8 2.7 1000 to 4000 3.9 3000 to 4500 1.8 0.2 figure 6. lo input return loss figure 7. lo input return lossmixer enabled and disabled frequency (ghz) 0.2 return loss (db) ?15 ?10 ?5 3.2 5567 f06 ?20 1.2 2.2 0.7 3.7 1.7 2.7 4.74.2 ?25 0 c5 = 27pf, c6 = 10pf c5 = 6.8pf, c6 = 2.7pf c5 = 3.9pf c5 = 1.8pf, c6 = 0.2pf t c = 25c frequency (ghz) 0.2 return loss (db) 0 ?2 ?4 ?6 ?8 ?10 ?12 ?14 ?16 ?18 4.74.2 5567 f07 1.2 2.2 3.2 3.7 0.7 1.7 2.7 t c = 25c c5 = 3.9pf disabled enabled table 3. lo input impedance and s11 (at pin 15, no external matching, mixer enabled) frequency (mhz) input impedance s11 mag angle 350 5.2 + j14.9 0.83 146.5 400 6.0 + j17.3 0.81 141.7 450 6.6 + j19.5 0.80 137.0 500 7.2 + j21.5 0.78 132.7 600 9.1 + j26.5 0.75 123.6 800 15.1 + j35.7 0.67 106.0 1000 24.9 + j43.6 0.58 89.5 1500 67.5 + j36.4 0.33 47.1 2000 61.7 C j4.2 0.11 C18.3 2500 40.3 C j7.1 0.13 C139.4 3000 31.7 + j1.8 0.23 173.1 3500 29.8 + j12.3 0.29 140.0 4000 31.5 + j22.9 0.35 113.2 4500 36.0 + j32.4 0.38 92.8 the lo buffers have been designed such that the lo input impedance does not change significantly when the ic is disabled. this feature only requires that supply voltage is applied. the actual performance of this feature is shown in figure 7. as shown, the lo input return loss is better than 10db over the 1ghz to 4ghz frequency range when the ic is enabled or disabled. if output the if output schematic with external matching compo- nents is shown in figure 8. as shown, the output is dif- ferential open collector. each if output pin must be biased at the supply voltage (v cc ), which is applied through the external matching inductors (l1 and l2) shown in figure?8. each pin draws approximately 27.5ma of dc supply cur - rent (55ma total).
ltc5567 14 5567f a pplica t ions i n f or m a t ion the differential if output impedance can be modeled as a frequency-dependent parallel r-c circuit, using the values listed in table 4. this data is referenced to the package pins (with no external components) and includes the effects of the ic and package parasitics. resistors r1 and r2 are used to reduce the output resistance, which increases the if bandwidth and input p1db, but reduces the conversion gain. the standard downmixer test circuit shown in figure 1 uses bandpass matching and 3.01k resistors to realize a 400 differential output, followed by an 8:1 transformer to get a 50 single-ended output. c7 and c8 are 330pf dc-blocking capacitors. the values of l1 and l2 are calculated to resonate with the internal if capacitance (c if ) at the desired if center frequency, using the following equation: l1, l2 = 1 2 ? ? f if ( ) 2 ? 2 ? c if for if frequencies below 100mhz, the inductor values become unreasonably high and the highpass impedance matching network described in a later section is preferred, due to its lower inductor values. measured 1db (conversion gain) if frequency range for each inductor value is shown. the inductor values listed are less than the ideal calculated values due to the additional capacitance of the 8:1 transformer. for differential if out - put applications where the 8:1 transformer is eliminated, the ideal calculated values should be used. measured if output return losses are shown in figure 9. table 4. if output impedance and bandpass matching element values vs if frequency. if frequency (mhz) differential if output impedance (r if || c if ) if matching using tc8-1 l1, l2 1db if frequency range (mhz) 140 532||1.0pf 390nh 65 to 327 153 532||1.0pf 300nh 84 to 350 190 530 ||1.0pf 210nh 107 to 375 250 525 ||1.0pf 120nh 160 to 415 380 511 ||1.0pf 51nh 288 to 520 500 500 ||1.03pf 1000 454 ||1.07pf 1500 364 ||1.12pf 2000 268 ||1.24pf 2500 209 ||1.41pf figure 9. if output return loss400 bandpass matching with 8:1 transformer frequency (mhz) ?30 return loss (db) ?20 ?10 0 ?25 ?15 ?5 150 250 350 450 5567 f09 550 10050 200 300 400 500 390nh 300nh 210nh 120nh 51nh t1 = tc8-1 r1, r2 = 3.01k c7, c8 = 330pf 10 11 ltc5567 5567 f08 l1 l2 r1 r2 t1 c2 10nf v cc if out 50 if + if ? v cc c8 c7 figure 8. if output schematic with external matching wideband differential if output wide if bandwidth and high input 1db compression are obtained by reducing the if output resistance with resistors r1 and r2. this will reduce the mixers conversion gain, but will not degrade the iip3 or noise figure. table 4 summarizes the optimum if matching inductor values, versus if center frequency, to be used in the standard downmixer test circuit shown in figure 1. the
ltc5567 15 5567f a pplica t ions i n f or m a t ion figure 12. voltage conversion gain, iip3 and nf vs if output frequency for wideband 200 differential if figure 11. test circuit for wideband 200 differential output the if matching shown in figure 10 uses 249 resistors and 390nh supply chokes to produce a wideband 200 differential output. this differential output is suitable for driving a wideband differential amplifier, filter, or a wide - band 4:1 transformer. the evaluation board layout allows the removal of the if transformer to evaluate the mixer performance with a differential output. the complete test circuit, shown in figure 11, uses re - sistive impedance matching attenuators (l-pads) on the evaluation board to transform each 100 if output to 50. an external 0/180 power combiner is then used to convert the 100 differential output to 50 single-ended, to facilitate measurement. table 5 compares the if bandwidth and 1db compression for the standard 400 and wideband 200 if output re- sistances. as shown, the 200 matching doubles the if bandwidth, and increases the rf input p1db to +13dbm. table 5. if bandwidth and 1db compression for 400 and 200 differential if output resistance (rf = 1.69 to 2.24ghz, lo = 1.65ghz, v cc = 3.3v, t c = 25c, l1, l2 = 390nh) r out () r1, r2 () p1db (dbm) 1db (conversion gain) if frequency range 400 3.01k 10.1 65mhz to 327mhz 200 249 13.0 45mhz to 580mhz measured voltage conversion gain, iip3 and ssb noise figure, at the 200 differential output are plotted in fig- ure?12. voltage gain, rather than power gain, is plotted to emphasize the voltage gain due to the 200 output. as shown, the conversion gain is flat within 1db over the 45mhz to 590mhz if output frequency range. if frequency (mhz) 40 90 g v (db), iip3 (dbm), ssb nf (db) 390 440 490 540 5567 f12 140 190 240 290 340 590 12 10 8 6 4 14 18 20 22 28 16 24 26 iip3 g v nf rf = 1.69ghz to 2.24ghz lo = 1.65ghz z rf = 50 z if = 200 differential t c = 25c if ? ltc5567 5567 f10 330pf 330pf 249 249 390nh 390nh v cc if + 100 200 load 100 figure 10. wideband 200 differential output if out 50 if out 200 if + 50 if ? 50 rf en en 10nf 249 249 lo 1.65ghz 0dbm 3.3v 89ma 10nf v cc if + ltc5567 if ? iadj 2.7pf rf 1.69ghz to 2.24ghz 330pf 1mhz to 500mhz combiner l-pads and 180 combiner for 50 single-ended measurement 330pf bias rf 5567 f11 3.9pf lo lo 71.5 69.8 71.5 69.8 390nh 390nh out 0 180
ltc5567 16 5567f a pplica t ions i n f or m a t ion figure 14. voltage conversion gain versus if frequency for 153mhz highpass and wideband bandpass if matching networks highpass if matching by simply changing component values, the bandpass if output matching network can be changed to a highpass impedance transforming network. this matching network will drive a lower impedance differential load (or trans- former), like the 200 wideband bandpass matching previously described, while delivering higher conversion gain, similar to the 400 bandpass matching. the high- pass matching network will have less if bandwidth than the bandpass matching. it also uses smaller inductance values; an advantage when designing for if center frequen- cies well below 100mhz. referring to the small-signal output network schematic in figure 13, the reactive matching element values (l1, l2, c7 and c8) are calculated using the following equations. the source resistance (r s ) is the parallel combination of external resistors r1 + r2 and the internal if resistance, r if taken from table 4. the differential load resistance (r l ) is typically 200, but can be less. c if , the if output capacitance, is taken from table 4. choosing r s in the 380 to 450 range will yield power conversion gains around 2db. r s = r if || 2r1 (r1 = r2) q = (r s /r l C1) (r s > r l ) y l = q/r s + ( if ? c if ) l1, l2 = 1/(2 ? y l ? if ) c7, c8 = 2/(q ? r l ? if ) figure 13. if output circuit for highpass matching element value calculations wideband test circuit, shown in figure 11, was modified with the following new element values, and re-tested. l1, l2 = 150nh c7, c8 = 10pf r1, r2 = 1.1k measured voltage conversion gain for the highpass and wideband bandpass methods are shown in figure 14, for comparison. both circuits are driving a 200 differential load, but the highpass version delivers 2.3db of additional gain at 153mhz. measured per formance for both circuits is summarized in table 6. as shown, the highpass method has less than half the if bandwidth, and 3db lower p1db. table 6. measured performance comparison for highpass and wideband if matching (rf = 1950mhz, if = 153mhz, low side lo). if matching g v (db) iip3 (dbm) p1db (dbm) 1db (conversion gain) if frequency range highpass 8.5 26.9 10.0 110mhz to 320mhz wideband 6.2 26.9 13.0 45mhz to 590mhz if frequency (mhz) 50 voltage conversion gain (db) 2 6 4 8 450 5567 f14 0 ?2 ?4 ?5 3 7 5 9 1 ?1 ?3 150 250 350 550 400 100 200 300 500 rf = 1.7ghz to 2.2ghz lo = 1.65ghz at 0dbm z rf = 50 z if = 200 differential t c = 25c wideband bandpass 153mhz highpass if ? ltc5567 5567 f13 c8 c7 r1 r2 l1 l2 v cc if + r if c if r l 11 10 to demonstrate the highpass impedance transformer output matching, these equations were used to calculate the element values for a 153mhz if frequency and 200 differential load resistance. the output matching on the mixer bias current reduction the iadj pin (pin 8) is available for reducing the mixer core dc current consumption at the expense of linearity and p1db. for the highest performance, this pin should be left open circuit. as shown in figure 15, an internal bias circuit produces a 3ma reference current for the mixer core. if a resistor is connected to pin 8, as shown
ltc5567 17 5567f a pplica t ions i n f or m a t ion 11 10 if ? v cc v cc i cc 34ma l2 l1 v cc 8 iadj 55ma bias 3ma bias r3 ltc5567 5567 f12 if + 6 figure 15. iadj interface in figure 15, a portion of the reference current can be shunted to ground, resulting in reduced mixer core cur - rent. for example, r3 = 1k will shunt away 1ma from pin 8 and reduce the mixer core current by 33%. the nominal, open-circuit dc voltage at the iadj pin is 2.2v. table 7 lists dc supply current and rf performance at 1950mhz for various values of r3. table 7. mixer performance with reduced current (rf = 1950mhz, low side lo, if = 153mhz) r3 () i cc (ma) g c (db) iip3 (dbm) p1db (dbm) nf (db) open 89.0 1.9 26.9 10.2 11.8 10k 84.6 1.9 25.7 10.2 11.5 1k 70.4 1.6 21.4 10.1 10.5 330 62.9 1.3 19.3 9.5 10.3 100 58.3 1.0 17.9 8.5 10.1 enable interface figure 16 shows a simplified schematic of the enable interface. to enable the mixer, the en voltage must be higher than 2.5v. if the enable function is not required, the pin should be connected directly to v cc . the volt- age at the en pin should never exceed the power supply voltage (v cc ) by more than 0.3v. if this should occur, the supply current could be sourced through the esd diode, potentially damaging the ic. 4 6 clamp 300k cmos 500 ltc5567 v cc en en 5567 f16 figure 16. enable input circuit the en pin has an internal 300k pull-down resistor. therefore, the mixer will be disabled with the enable pin left floating. supply voltage ramping fast ramping of the supply voltage can cause a current glitch in the internal esd clamp circuits connected to the v cc pin. depending on the supply inductance, this could result in a supply voltage transient that exceeds the 4.0v maximum rating. a supply voltage ramp time greater than 1ms is recommended. spurious output levels mixer spurious output levels versus harmonics of the rf and lo are tabulated in table 8. the spur levels were measured on a standard evaluation board using the test circuit shown in figure 1. the spur frequencies can be calculated using the following equation: f spur = (m ? f rf ) C (n ? f lo ) table 8. if output spur levels (dbm) (rf = 1950mhz, p rf = C2dbm, p if = 0dbm at 153mhz, low side lo, p lo = 0dbm, v cc = 3.3v, t c = 25c) n m 0 1 2 3 4 5 6 7 8 9 0 C43 C24 C47 C30 C57 C46 C64 C50 C81 1 C30 0 C56 C57 C59 C37 C69 C47 C78 C58 2 C60 C56 C67 C68 C72 C78 C78 C85 C87 * 3 * C81 C89 * * * * * * * 4 * * C73 * * * * * C90 * 5 * * * * * * * * * * 6 * * * * * * * * * 7 * * * *less than C90dbc
ltc5567 18 5567f typical a pplica t ions 300mhz rf application with 70mhz highpass if matching if out 50 70mhz nom rf en en 10nf 1.1k 1.1k lo in 50 370mhz 40mhz 3.3v 89ma 10nf v cc if + ltc5567 if ? iadj 120pf rf in 50 300mhz 40mhz 22pf tc4-1w 4:1 22pf bias rf 5567 ta03a 330pf lo lo 22pf 390nh 3.3nh 390nh typical performance (rf = 300mhz, if = 70mhz, lo = 370mhz at 0dbm) g c = 0.6db iip3 = 26.3dbm ssb nf = 13.3db input p1db = 10.9dbm 22pf conversion gain, iip3 and nf vs rf frequency rf isolation and lo leakage vs rf and lo frequency rf, lo and if port return losses rf frequency (mhz) 260 ?2 0 g c (db), iip3 (dbm), nf (db) 4 8 12 28 20 300 24 16 2 6 10 26 18 22 14 340 280 320 360 380 400 5567 ta03b iip3 nf g c high side lo p lo = 0dbm if = 70mhz t c = 25c rf/lo frequency (mhz) 260 rf isolation (db) lo leakage (dbm) 45 50 55 340 420 5567 ta03c 40 35 30 300 380 60 65 70 ?50 ?40 ?30 ?60 ?70 ?80 ?20 ?10 0 460 rf-lo lo-if lo-rf rf-if frequency (mhz) ?40 return loss (db) ?20 ?10 10 5 0 ?35 ?30 ?25 ?15 ?5 150 250 350 5567 ta03d 450 10050 200 300 400 lo rf if
ltc5567 19 5567f information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no representa - tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. 4.00 0.10 (4 sides) note: 1. drawing conforms to jedec package outline mo-220 variation (wggc) 2. drawing not to scale 3. all dimensions are in millimeters 4. dimensions of exposed pad on bottom of package do not include mold flash. mold flash, if present, shall not exceed 0.15mm on any side 5. exposed pad shall be solder plated 6. shaded area is only a reference for pin 1 location on the top and bottom of package pin 1 top mark (note 6) 0.55 0.20 1615 1 2 bottom view?exposed pad 2.15 0.10 (4-sides) 0.75 0.05 r = 0.115 typ 0.30 0.05 0.65 bsc 0.200 ref 0.00 ? 0.05 (uf16) qfn 10-04 recommended solder pad pitch and dimensions 0.72 0.05 0.30 0.05 0.65 bsc 2.15 0.05 (4 sides) 2.90 0.05 4.35 0.05 package outline pin 1 notch r = 0.20 typ or 0.35 45 chamfer uf package 16-lead plastic qfn (4mm 4mm) (reference ltc dwg # 05-08-1692 rev ?) p ackage descrip t ion please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
ltc5567 20 5567f linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 fax : (408) 434-0507 www.linear.com linear technology corporation 2012 lt 0412 ? printed in usa r ela t e d p ar t s typical a pplica t ion part number description comments infrastructure lt ? 5527 400mhz to 3.7ghz, 5v downconverting mixer 2.3db gain, 23.5dbm iip3 and 12.5db nf at 1900mhz, 5v/78ma supply lt5557 400mhz to 3.8ghz, 3.3v downconverting mixer 2.9db gain, 24.7dbm iip3 and 11.7db nf at 1950mhz, 3.3v/82ma supply ltc559x 600mhz to 4.5ghz dual downconverting mixer family 8.5db gain, 26.5dbm iip3, 9.9db nf, 3.3v/380ma supply ltc5569 300mhz to 4ghz, 3.3v dual active downconverting mixer 2db gain, 26.8dbm iip3 and 11.7db nf, 3.3v/180ma supply ltc554x 600mhz to 4ghz, 5v downconverting mixer family 8dbm gain, >25dbm iip3 and 10db nf, 3.3v/200ma supply ltc6400-x 300mhz low distortion if amp/adc driver fixed gain of 8db, 14db, 20db and 26db; >36dbm oip3 at 300mhz, differential i/o ltc6416 2ghz 16-bit adc buffer 40dbm oip3 to 300mhz, programmable fast recovery output clamping ltc6412 31db linear analog vga 35dbm oip3 at 240mhz, continuous gain range C14db to 17db lt5554 ultralow distort if digital vga 48dbm oip3 at 200mhz, 2db to 18db gain range, 0.125db gain steps lt5578 400mhz to 2.7ghz upconverting mixer 27dbm oip3 at 900mhz, 24.2dbm at 1.95ghz, integrated rf transformer lt5579 1.5ghz to 3.8ghz upconverting mixer 27.3dbm oip3 at 2.14ghz, nf = 9.9db, 3.3v supply, single-ended lo and rf ports ltc5588-1 200mhz to 6ghz i/q modulator 31dbm oip3 at 2.14ghz, C160.6dbm/hz noise floor ltc5585 700mhz to 3ghz wideband i/q demodulator >530mhz demodulation bandwidth, iip2 tunable to >80dbm, dc offset nulling rf power detectors lt5538 40mhz to 3.8ghz log detector 0.8db accuracy over temperature, C72dbm sensitivity, 75db dynamic range lt5581 6ghz low power rms detector 40db dynamic range, 1db accuracy over temperature, 1.5ma supply current ltc5582 40mhz to 10ghz rms detector 0.5db accuracy over temperature, 0.2db linearity error, 57db dynamic range ltc5583 dual 6ghz rms power detector up to 60db dynamic range, 0.5db accuracy over temperature, >50db isolation adcs ltc2208 16-bit, 130msps adc 78dbfs noise floor, >83db sfdr at 250mhz LTC2153-14 14-bit, 310msps low power adc 68.8dbfs snr, 88db sfdr, 401mw power consumption catv downconverting mixer with 1ghz if bandwidth if out 50mhz to 1000mhz 50 rf in 1150mhz 50 10pf 1.8pf 5567 ta02a rf en 402 402 lo in 1200mhz to 2150mhz 50 v cc 3.0v to 3.6v 10nf 1f 10v v cc if + ltc5567 if ? iadjnc 1nf t1 mabact0066 1nf 3.9pf 220nf 10nf 15nh 68nh 68nh 15nh 17 gnd 2 3 gnd 1 temp 4 gnd gnd 9 6 5 7 8 en gnd lo 12 11 10 gnd nc gnd 16 14 15 13 if output frequency (mhz) 0 g c (db), oip3 (dbm) 2rf-lo spur (dbc) 600 5567 ta02b 200 800 400 1000 oip3 2rf-lo g c rf = 1150mhz p rf = ?6dbm high side lo p lo = 0dbm t c = 25c 6 24 27 30 0 18 12 3 21 ?3 15 9 ?80 ?20 ?10 0 ?100 ?40 ?60 ?90 ?30 ?110 ?50 ?70 conversion gain, oip3 and 2rf-lo spur vs if output frequency

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